Re: Patch to add support for SGI's IOC4 chipset
From: Jeremy Higdon (jeremy_at_sgi.com)
Date: 10/23/03
- Previous message: M.H.VanLeeuwen: "[PATCH] 2.6.0-test8 ISAPNP ne.c initialization"
- In reply to: Bartlomiej Zolnierkiewicz: "Re: Patch to add support for SGI's IOC4 chipset"
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Date: Wed, 22 Oct 2003 21:34:58 -0700 To: Bartlomiej Zolnierkiewicz <B.Zolnierkiewicz@elka.pw.edu.pl>
On Wed, Oct 22, 2003 at 08:31:02PM +0200, Bartlomiej Zolnierkiewicz wrote:
>
> I think there is another bug:
>
> ...
> hwif->hw.ack_intr = &sgiioc4_checkirq; /* MultiFunction Chip */
> ...
>
> sgiioc4_clearirq() should be used instead of sgiioc4_checkirq() here,
> because otherwise IRQ won't be cleared.
>
> In order to do this you must modify sgiioc4_clearirq() slightly,
> just change "return intr_reg;" to "return intr_reg & 0x03;".
>
> If you wonder why, please look at ide_ack_intr() use in ide-io.c:ide_intr().
Thanks. I've taken a look at it and have become puzzled.
It looks as though ide_ack_intr normally just "returns" 1 and has no
other effect. But then I see some ide drivers that also have an ack_intr
routine. On some (most?) architechtures, it would appear that the ack_intr
routine is not used, since the ide_ack_intr macro will not call it.
In gayle_ack_intr_a4000(), it looks as though all it does is read a
register and return something. Is that register read supposed to clear
interrupt as a side effect.
So maybe an explicit clear is not needed on most implementations?
jeremy
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- Previous message: M.H.VanLeeuwen: "[PATCH] 2.6.0-test8 ISAPNP ne.c initialization"
- In reply to: Bartlomiej Zolnierkiewicz: "Re: Patch to add support for SGI's IOC4 chipset"
- Next in thread: Jeremy Higdon: "Re: Patch to add support for SGI's IOC4 chipset"
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