Re: [2.4][PATCH] Xeon HT - SMT+SMP interrupt balancing
From: Arjan van de Ven (arjanv_at_redhat.com)
Date: 12/11/03
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To: Ken <ken@nova.org> Date: Thu, 11 Dec 2003 17:59:44 +0100
On Thu, 2003-12-11 at 17:44, Ken wrote:
> I have attempted user space alternatives -- irq_balance-0.06 and
> smp_affinity via sysctrl. The former seems to "blindly" affine an IRQ
> to a single logical CPU, which in my case, puts the timer and eth3 on
> CPU0 and it gets "overloaded" while the others are mostly idle.
1) This got fixed in version 0.07
2) You are talking a whopping 100 irq's per second, which is like about
no interrupts... I doubt you can find a scenario where 100 irq's per
second matter.... ;)
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- Previous message: Josh McKinney: "Re: Fixes for nforce2 hard lockup, apic, io-apic, udma133 covered"
- In reply to: Ken: "[2.4][PATCH] Xeon HT - SMT+SMP interrupt balancing"
- Next in thread: Ken: "Re: [2.4][PATCH] Xeon HT - SMT+SMP interrupt balancing"
- Reply: Ken: "Re: [2.4][PATCH] Xeon HT - SMT+SMP interrupt balancing"
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