Re: Active Memory Defragmentation: Our implementation & problems
From: Timothy Miller (miller_at_techsource.com)
Date: 02/04/04
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Date: Wed, 04 Feb 2004 14:37:53 -0500 To: root@chaos.analogic.com
Richard B. Johnson wrote:
> If this is an Intel x86 machine, it is impossible for pages
> to get fragmented in the first place. The hardware allows any
> page, from anywhere in memory, to be concatenated into linear
> virtual address space. Even the kernel address space is virtual.
> The only time you need physically-adjacent pages is if you
> are doing DMA that is more than a page-length at a time. The
> kernel keeps a bunch of those pages around for just that
> purpose.
>
> So, if you are making a "memory defragmenter", it is a CPU time-sink.
> That's all.
Would memory fragmentation have any appreciable impact on L2 cache line
collisions?
Would defragmenting it help?
In the case of the Opteron, there is a 1M cache that is (I forget) N-way
set associative, and it's physically indexed. If a bunch of pages were
located such that there were a disproportionately large number of lines
which hit the same tag, you could be thrashing the cache.
There are two ways to deal with this: (1) intelligently locates pages
in physical memory; (2) hope that natural entropy keeps things random
enough that it doesn't matter.
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- Previous message: Randazzo, Michael: "Kernel 2.x POSIX Compliance/Conformance..."
- In reply to: Richard B. Johnson: "Re: Active Memory Defragmentation: Our implementation & problems"
- Next in thread: Dave Hansen: "Re: Active Memory Defragmentation: Our implementation & problems"
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