Re: page fault fastpath patch v2: fix race conditions, stats for 8,32 and 512 cpu SMP
From: Christoph Lameter (clameter_at_sgi.com)
Date: 08/19/04
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Date: Wed, 18 Aug 2004 18:19:14 -0700 (PDT) To: Hugh Dickins <hugh@veritas.com>
> > - One could avoid pte locking by introducing a pte_cmpxchg. cmpxchg
> > seems to be supported by all ia64 and i386 cpus except the original 80386.
>
> I do think this will be a more fruitful direction than pte locking:
> just looking through the arches for spare bits puts me off pte locking.
Thanks for the support. Got a V3 here (not ready to post yet) that throws
out the locks and uses cmpxchg instead. It also removes the use of
page_table_lock completely from handle_mm_fault.
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- Previous message: David Gibson: "[PPC64] Bolted SLB entry for iSeries"
- In reply to: Hugh Dickins: "Re: page fault fastpath patch v2: fix race conditions, stats for 8,32 and 512 cpu SMP"
- Next in thread: Benjamin Herrenschmidt: "Re: page fault fastpath: Increasing SMP scalability by introducing pte locks?"
- Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]