Re: REGRESSION: the new i386 timer code fails to sync CPUs

Hi,

Andrew Morton:
Hack out the i386 TSC sync code.

diff --git a/arch/i386/kernel/smpboot.c b/arch/i386/kernel/smpboot.c
index 6f5fea0..cd28914 100644
--- a/arch/i386/kernel/smpboot.c
+++ b/arch/i386/kernel/smpboot.c
@@ -435,7 +435,7 @@ static void __devinit smp_callin(void)
/*
* Synchronize the TSC with the BP
*/
- if (cpu_has_tsc && cpu_khz && !tsc_sync_disabled)
+ if (0 && cpu_has_tsc && cpu_khz && !tsc_sync_disabled)
synchronize_tsc_ap();
}

@@ -1305,7 +1305,7 @@ static void __init smp_boot_cpus(unsigne
/*
* Synchronize the TSC with the AP
*/
- if (cpu_has_tsc && cpucount && cpu_khz)
+ if (0 && cpu_has_tsc && cpucount && cpu_khz)
synchronize_tsc_bp();
}

I guess Matthias didn't test this patch. Can we get some obviously-correct
fix in place for 2.6.18?

This patch doesn't change the problem.

--
Matthias Urlichs | {M:U} IT Design @ m-u-it.de | smurf@xxxxxxxxxxxxxx
Disclaimer: The quote was selected randomly. Really. | http://smurf.noris.de
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Success is always being able to wear clothing that you actually like.
-- SJM

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