Re: [RFC] MMIO accessors & barriers documentation

Alan Cox <alan@xxxxxxxxxxxxxxxxxxx> writes:

"Except where the underlying device is marked as cachable or
prefetchable"

You aren't supposed to use MMIO accessors on cacheable memory, are you ?

Why not. Providing it is in MMIO space, consider ROMs for example or
write path consider frame buffers.

Frame buffers are rarely cachable as such, on x86 they are usually
write-combining. Which means that the writes can be merged and
possibly reordered while they are being written but they can't be
cached. Most arches I believe have something that roughly corresponds
to write combining.

Ensuring we can still use this optimization to mmio space is
moderately important.

Eric



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