Re: [PATCH] x86: provide a DMI based port 0x80 I/O delay override

On 30-12-07 16:28, Ingo Molnar wrote:

Reading from the 0x3cc port does not impact the cursor position update sequence IIRC - i think the vidport is even ignored for the input direction by most hardware, there's a separate input register. The 0x3cc port is a well-defined VGA register which should be unused on non-VGA hardware. (which makes it a perfect delay register in any case)

Hardly. Duron 1300 on AMD756:

rene@7ixe4:~/src/port80$ su -c ./port80
cycles: out 2400, in 2401
rene@7ixe4:~/src/port80$ su -c ./port3cc
cycles: out 459, in 394

As stated a few dozen times by now already, port 0x80 is _decidedly_ _non_ _random_

Rene.

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