Re: [SLE] irqbalance question on openSuSE 10.1
- From: Per Jessen <per@xxxxxxxxxxxx>
- Date: Wed, 31 May 2006 16:51:43 +0200
Per Jessen wrote:
It seems HT CPUs were just a transitional state between older single
CPU chips and modern multi-core chips.
Hmm, that's stretching it a bit I think.
Actually, Intels marketing says exactly what you're saying ... but at
least it confirms what I said about the 2 x 1Mb L2-cache :-)
/Per Jessen, Zürich
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- References:
- [SLE] irqbalance question on openSuSE 10.1
- From: Rui Santos
- Re: [SLE] irqbalance question on openSuSE 10.1
- From: Per Jessen
- Re: [SLE] irqbalance question on openSuSE 10.1
- From: Randall R Schulz
- Re: [SLE] irqbalance question on openSuSE 10.1
- From: Per Jessen
- [SLE] irqbalance question on openSuSE 10.1
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