Re: makefile help
- From: Kevin Nathan <knathan@xxxxxxxxxxxxx>
- Date: Mon, 15 Jun 2009 21:20:38 -0700
On Mon, 15 Jun 2009 20:10:12 -0700
Tim Prince <timothyprince@xxxxxxxxxxxxx> wrote:
AnandA wrote:
I have a requirement where I need to compile a target twice in the
same makefile. I'm compiling a C code and then linking but using
linker utility to generate an output file.
This output file I want to use to compile again the same C code and
then link for final output generation.
I'm compiling for our own processor. I was wondering how I can write
makefile for achieving this.
I did not see the original msg (Windows, Google Groups, whatever) and
can only assume the above is the entire msg. If so, we need a *lot*
more information on what you are trying to do. Basically, 'make' and
makefiles were designed to eliminate excess work. Can you give us more
info on why you need to compile the same source twice?
Alternatively, you may want to pose your question in a programming
group like comp.lang.c, comp.lang.c++, etc.
By copying gcc?
How would that help in writing a makefile? ;-)
--
Kevin Nathan (Arizona, USA)
Linux Potpourri and a.o.l.s. FAQ -- (temporarily offline)
Open standards. Open source. Open minds.
The command line is the front line.
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9:11pm up 7 days 6:07, 29 users, load average: 0.29, 0.42, 0.54
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- From: AnandA
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- From: Tim Prince
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