Re: make problems
Jens.Toerring_at_physik.fu-berlin.de
Date: 01/07/05
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Date: 7 Jan 2005 13:07:25 GMT
baumann.Pan@gmail.com wrote:
> #define OS __LINUX_OS__
> CC = gcc
> LIB = rafw.a
> DEST = ../Bin/
> SOURCES = $(wildcard *.c)
>
> OBJS = $(patsubst %.c,%.o, $(SOURCES))
> INCS = $(wildcard *.h) $(wildcard ../Common/*.h)
> $(LIB) : $(OBJS)
> $(AR) r $(DEST)$(LIB) $(OBJS)
>
> $(OBJS) : $(SOURCES) $(INCS)
> $(CC) -c -g $(SOURCES)
>
> clean:
> -rm -rf *.o
>
> --------------------------------------------------------------------
> now I still have two puzzles
> 1)
> #define OS __LINUX_OS__
> why can not I declare it in command statement?
What's that supposed to do? It looks like a #define statement from C,
but make isn't C. If you want 'OS' to be defined in the C files you
need to tell the compiler about it. For gcc you would need a command
line option like "-DOS=__LINUX_OS__".
> 2)
> since I have $(INCS) in the dependcy,
> in the command statement , I think I don't have to include the path.
You still need the path - what's stored in $(INCS) is used here only in
the prerequisites, so make only checks if one of the .h files is newer
than the file to create, but it isn|t passing anything to gcc. So, unless
you have the "../Common" path in the #include directives in the .c and
.h files you definitely will need "-I../Common" as a command line option
to gcc.
Moreover, your line for creating the .o files is broken. You need
something like
%.o: %.c $(INCS)
$(CC) -c -g -I../Common -DOS=__LINUX_OS__ -o $@ $<
This tells make to create an .o file from the .c file with the same
name (when either the .c or one of the header files is newer than
an existing .o file or if the .o file does not exist). The "-o $@"
bit on the command line translates to "-o" followed by the name of
the file to be created and the "$<" translates to the name of the
first file of the list of prerequisites, i.e. the .c file.
Your makefile is also missing a definition of what $(AR) is and the
command to create a static library doesn't look correct. I would
make that
AR = ar
ARFLAGS = crs
$(LIB): $(OBJS)
$(AR) $(ARFLAGS) $(DEST)$@ $^
The '$^' bit expands to all the prerequisites, so here it is equivalent
to using $(OBJS). There is still a problem here, because make will
create the library every time it is called, even when it's not needed.
That's because make will search for the library only in the directory
it's running in, but the library gets created in the $(DEST) directory.
So I would recommend to change this to
DEST = ../Bin/
LIB = $(DEST)rafw.a
$(LIB): $(OBJS)
$(AR) $(ARFLAGS) $@ $^
Regards, Jens
-- \ Jens Thoms Toerring ___ Jens.Toerring@physik.fu-berlin.de \__________________________ http://www.toerring.de
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