Re: v/phy memory translationquestion

From: Kasper Dupont (kasperd_at_daimi.au.dk)
Date: 10/08/04 

Date: Fri, 08 Oct 2004 07:23:44 +0200

Ask wrote:
>
> Hi,
> I came accros MMU section about MPC860. About v/p address tranlation
> it mentions that it support 16 virtual memory spaces (4 bit ID indentify them).
> I'm wondering how linux implementation deal with that. It's certain that we
> have more than 16 processes simultaneously.

I don't know exactly how Linux is implemented on that platform.
But Linux already run without problems on architectures that
can have only one translation at the time. On IA32 switching
to a different address space is an expensive operation, so
the kernel does lazy switchcing. The kernel itself is in every
address space, so you can switch from user mode to kernel mode
where you switch between a number of kernel threads, and back
again to any thread in the original user mode process without
having to perform this switch.

So what is the advantage of these 16 address spaces? Does it
just mean, that we can switch more efficiently between them?
If it is just a performance optimization, a good approach might
be to use one for the kernel and "cache" the 15 least recently
used user spaces. 

-- 
Kasper Dupont

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