Re: Clarification on IO Operations

From: Gary Kato (garykato_at_aol.com)
Date: 12/29/04 

Date: 29 Dec 2004 06:52:20 GMT

>1.What is Non Memory addresses???
>2.How Non Memory IO exactly works???(eg: port I/O)??
>3.How Processor can Access Non Memory I/O Devices..??

Some processors, like the Intel 8086 and Zilog Z80, have special I/O
instructions like IN and OUT. These instructions use a separate I/O address
space. The usual term for these I/O locations are I/O ports. As an example, the
Z80 can address 65536 bytes of memory, but only 256 I/O ports. There is usually
a separate pin (or two) on the CPU to distinguish I/O access from Memory
access.

Relevant Pages

  • [RFC] page replacement requirements
    ... Submitting too much I/O at once can kill latency and even lead to deadlocks when bounce buffers are involved. ... Must be able to deal with multiple memory zones efficiently. ... When on completion of the write to their backing-store the reference bit is still unset a callback is invoked to place them so that they are immediate candidates for reclaim again. ... For traditional page replacement algorithms this is not a big issue since we just implement per zone page replacement; ...
    (Linux-Kernel)
  • RFC: CONFIG_PAGE_SHIFT (aka software PAGE_SIZE)
    ... answered I disliked the dependency on defrag for reliable I/O and I ... all the memory allocations are ... the moment you need to relay on order> 0 allocations ... printf("%d usecn", usec); ...
    (Linux-Kernel)
  • Re: Forth as an operating system
    ... service to I/O events or the lowest OS overhead in general. ... We say that an interrupt cannot be the fastest because it ... We say that multiple memory operations cannot ... ISR are the fastest solution possible. ...
    (comp.lang.forth)
  • Re: Mainframe not a good architecture for interactive was Re: What is the future of COBOL? Answer:
    ... > Mainframes are MEMORY centric using ECC type memory. ... Supposing I said there are Intel I/O chips that can maintain around a GIG ... applications require fast I/O throughput for optimal performance. ...
    (comp.lang.cobol)
  • Re: 21st Century ISA goals?
    ... I were talking about primarily servers with large amounts of fast i/o to things like disks and network interfaces that currently go through some flavor of PCI bus. ... I'm not talking about the cache coherence traffic, though a well integrated I/O processor could get data from at least the L2 cache when it was there, eliminating the need for the write back to main memory. ...
    (comp.arch)