PCI Address Decoder
From: UNM (zhjing_at_unm.edu)
Date: 04/14/05
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Date: Thu, 14 Apr 2005 14:24:52 -0600
Hi,
I am developing a PCI device driver for Linux. The device is a DSP by
itself, which is connected to the PCI slot on the PC.
I was told by the device manufacture that the 18, 19th bit of the ADDRESS
(in kernerl linear memory space) that goes to the PCI device will be
interpreted by a "DECODER" as control signal, e.g., if both are 1s, the DSP
will reset. So, in order to reset the DSP, I will have to write 0 to a
specific address where 31~20 bit represent the device base address, the 18,
19th bit represent config. command to the DSP and 0~16 bits represent data.
Can anybody tell me what is exactly this PCI Address decoder?
BTW, is that true in PCI bus that the data and address share the same
(physical) 32 bit bus? Is address and data are transmitted at the same time?
Thanks!
Jing
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