Re: PCI Address Decoder
From: Tim Roberts (timr_at_probo.com)
Date: 04/17/05
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- In reply to: UNM: "PCI Address Decoder"
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Date: Sat, 16 Apr 2005 22:14:13 -0700
"UNM" <zhjing@unm.edu> wrote:
>
>I am developing a PCI device driver for Linux. The device is a DSP by
>itself, which is connected to the PCI slot on the PC.
>
>I was told by the device manufacture that the 18, 19th bit of the ADDRESS
>(in kernerl linear memory space) that goes to the PCI device will be
>interpreted by a "DECODER" as control signal, e.g., if both are 1s, the DSP
>will reset. So, in order to reset the DSP, I will have to write 0 to a
>specific address where 31~20 bit represent the device base address, the 18,
>19th bit represent config. command to the DSP and 0~16 bits represent data.
>
>Can anybody tell me what is exactly this PCI Address decoder?
The address decoder is part of the DSP. Your driver will map the device's
address space into linear address space. The top 12 bits will be provided
by the page mapping hardware in the processor. The other bits are entirely
under your control. Basically, you need a statement something like this
*(unsigned long *)(baseAddr + 0xC0000) = 0;
where baseAddr is the linear address you get back from the mapping.
It's not unheard of for hardware designers who think they are very clever
to pack data bits into the address lines. Personally, I think it is a
stupid concept. How do you debug it? How can I READ the data I just
wrote?
>BTW, is that true in PCI bus that the data and address share the same
>(physical) 32 bit bus?
Yes. The address and data are time multiplexed on the same set of pins,
either 32-bit or 64-bit.
>Is address and data are transmitted at the same time?
No. Address goes first, then data. In the case of burst writes, you get
one address, then a whole bunch of data cycles.
-- - Tim Roberts, timr@probo.com Providenza & Boekelheide, Inc.
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