Re: Kernel code and processor's Cache
- From: feng <xu_feng_xu@xxxxxxxxx>
- Date: Fri, 9 Apr 2010 15:49:17 -0700 (PDT)
The designers have already devoted as much chip area as makes economic
sense to cache. Therefor every line of kernel cache means one less line
of user cache, and the kernel cache will be idle almost all the time.
It makes much more sense to trade off the cost of the rare occasions on
which the kernel flushes useful user data out of the cache for the
benefit of maximizing user cache all of the rest of the time.
--
John Hasler
jhas...@xxxxxxxxxxx
Dancing Horse Hill
Elmwood, WI USA
Thanks John. I am convinced by this argument as i have stated above. I
was just just thinking why not cut off a bit of L3 cache to cache
only kernel routines. what impact will this have on the system
performance ?
.
- Follow-Ups:
- Re: Kernel code and processor's Cache
- From: John Hasler
- Re: Kernel code and processor's Cache
- References:
- Kernel code and processor's Cache
- From: feng
- Re: Kernel code and processor's Cache
- From: David Schwartz
- Re: Kernel code and processor's Cache
- From: Joe Pfeiffer
- Re: Kernel code and processor's Cache
- From: feng
- Re: Kernel code and processor's Cache
- From: Tim Roberts
- Re: Kernel code and processor's Cache
- From: feng
- Re: Kernel code and processor's Cache
- From: David Schwartz
- Re: Kernel code and processor's Cache
- From: feng
- Re: Kernel code and processor's Cache
- From: David Schwartz
- Re: Kernel code and processor's Cache
- From: feng
- Re: Kernel code and processor's Cache
- From: feng
- Re: Kernel code and processor's Cache
- From: John Hasler
- Kernel code and processor's Cache
- Prev by Date: Re: Kernel code and processor's Cache
- Next by Date: Re: Kernel code and processor's Cache
- Previous by thread: Re: Kernel code and processor's Cache
- Next by thread: Re: Kernel code and processor's Cache
- Index(es):
Relevant Pages
|